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Initialization or Reset
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Each time power to the module is turned on, an initialization (reset) procedure must be executed. This procedure consists of sending an initial group of instructions to configure the display for normal programming execution. Each module will automatically perform this procedure on power-up (using internal circuitry). However, for this to happen properly, the power supply rise time must meet the parameters shown below. To absolutely insure proper initialization, it might be best to turn the module power on and then send the proper initialization instructions from the microprocessor.
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| Because initialization may not be performed completely depending on the rise time of the power supply when it is turned on, pay attention to the adjacent time relationship. ^toff stipulates the time of power OFF for power supply instantaneous dip, or when power supply repeats ON and OFF. | ||||||||||||||||||||||
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As mentioned above, since some power supplies may not meet the above parameters, it may be better to absolutely ensure proper initialization by sending the following additional initialization instructions from the microprocessor after the above automatic initialization has taken place. These suggested codes create an automatically-incremented, steady line cursor, which is different from the automatic initialization. Also, note that the initial hex code 30,34 or 38 is sent twice to ensure the module enters the 8-bit data length mode without fail. All initialization is performed with RS and R/W, both 0 (low). Allow 15ms after initialization before sending additional software codes to display module.
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| Display Initialization |
| Real world power supplies dictate that the LCD be formally initialized. These brief software codes tell the display microprocessor how to handle incoming data and how to physically configure the display. Suggested here are initialization codes which create an automatically incremented, steady, line cursor. All initialization is performed with RS=R/W=0. FOR 8 BIT DATA BUS
8 bit, 1 line, 5 x 10..34,34,06,0E,01 8 bit, 2 lines, 5 x 7..38,38,06,0E,01 NOTE: RS & R/W must be 0. It is possible to write to just one line of a two line display. Using the 30 instruction will improve the contrast ration by eliminating line 2. Four bit machines may also operate the display module. Initialization is crucial and this format should be closely followed. As 4 bit operation requires that data be sent twice over the D4-D7 bus, memory requirements are doubled. An advantage is the ability to embed all 4 data bits, RS and R/W in a standard 8 bit wide memory. The 8 bit data bus demands at least 9 bits of memory. (assuming R/W is held low) 4 bit, 1 line, 5 x 7…2, 0, 2, 0, 0, 6, 0, E, 0, 1 NOTE: The single terminating ’1′ is crucial. For 5 x 10 or 2 lines change the repeated 20 code to repeated 24 or 28.
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| Sample Programs Here is a program which illustrates the simplicity of the LCD modules. The program writes two lines to the display, pausing after the first one is transmitted. The program is provided in both 8 and 4 bit versions. Display initialization must be complete before transmitting these codes. A star below a particular data code indicates a command and therefore RS must be set Low. All other entries set RS High. 8 bit (line 1) (line 2) To transmit this program on a 4 bit data bus, initialize properly and then double enter the 8 bit code. ie. 5,3,4,8,4,C,4,C,5,9 etc.
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| Control Codes
LCD MODULE CONtrOL CODES WITH “RS” LINE=0 |
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Programming the Custom Character Generator RAM
(Eight User Created Custom Characters) The character generator (CG) RAM allows eight custom 5×8 characters or four custom 5×11 characters to be user created and programmed. Once programmed, the newly-created characters or symbols are accessed exactly as if they were in ROM. However, since RAM is volatile memory, power must be continuously maintained. Otherwise, the programming format must be programmed into non-volatile external ROM and sent to the display following each display initialization. All dots of the character matrix may be programmed, including the cursor position, if desired.
The module’s RAM is divided into two parts: data display and character generator (not to be confused with 192-character generator ROM). The CG portion of RAM is located between hex 40 and 7F, and -is contiguous. Locations 40 thru 47 hold the first custom CG character, 48 thru 4F the second, 50 thru 57 the third, and so forth, to 78 thru 7F for the eighth custom CG character. If, during initialization, the display was programmed to automatically increment, then only the single initial address, 40, need be sent. Consecutive row data will automatically appear at 41, 42, etc. until the complete character is formed. All 8 custom CG characters can be programmed in 64 consecutive “writes” after sending the single initial address 40. CG RAM is 8 bits wide, although only the right-most 5 bits are used for a custom CG character row. The left-most dot of the character row corresponds to D4 in the most significant nibble (XXXD4) of the data bus code with the remaining 4 dots in the row corresponding to the least significant nibble (D3 thru D0), D0 being the right-most dot. Thus, hex 1F equals all dots on and hex 00 equals all dots off. Other examples include hex 15 (HLHLH) equal to 3 dots on and hex 0A (LHLHL) equal to 2 dots on. In each case, the key 5 bits of the 8-bit code, program one row of custom CG character. When all 7 or 8 rows are programmed, that character is complete. A graphic example is shown below.
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| RS | RW | Data | Display | Description |
| 0 | 0 | 40 | addresses 1st row, 1st CG character | |
| 1 | 0 | 11 | * * | result of 11, 1st row |
| 1 | 0 | 0A | * * | result of 0A, 2nd row |
| 1 | 0 | 1F | ***** | result of 1F, 3rd row |
| 1 | 0 | 04 | * | result of 04, 4th row |
| 1 | 0 | 1F | ***** | result of 1F, 5th row |
| 1 | 0 | 04 | * | result of 04, 6th row |
| 1 | 0 | 04 | * | result of 04, 7th row |
| 1 | 0 | 00 | result of 00, 8th row (cursor position) |
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| 1 | 0 | 15 | *** | 1st row, 2nd CG character |
| Note: addressing not now required, hex 48 is next in the sequence. |